********** Mapped Logic ********** |
FDCPE_BZ_OUT: FDCPE port map (BZ_OUT,BZ_OUT_D,CLK,'0','0');
BZ_OUT_D <= ((NOT BZ_OUT_OBUF.LFBK AND Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2.LFBK) OR (OUT_FLAG AND BZ_OUT_OBUF.LFBK AND NOT Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2.LFBK)); |
FDCPE_COUNTER0: FDCPE port map (COUNTER(0),COUNTER_D(0),CLK,'0','0');
COUNTER_D(0) <= ((EXP8_.EXP) OR (EXP9_.EXP) OR (COUNTER(11) AND NOT COUNTER(7) AND NOT COUNTER(0).LFBK) OR (NOT COUNTER(11) AND COUNTER(7) AND NOT COUNTER(0).LFBK) OR (COUNTER(12) AND NOT COUNTER(1) AND NOT COUNTER(0).LFBK) OR (NOT COUNTER(12) AND COUNTER(1) AND NOT COUNTER(0).LFBK) OR (NOT COUNTER(4) AND NOT COUNTER(0).LFBK AND COUNTER(14).LFBK)); |
FDCPE_COUNTER1: FDCPE port map (COUNTER(1),COUNTER_D(1),CLK,'0','0');
COUNTER_D(1) <= ((COUNTER(0) AND Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND NOT COUNTER(1).LFBK) OR (NOT COUNTER(0) AND Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(1).LFBK)); |
FTCPE_COUNTER2: FTCPE port map (COUNTER(2),COUNTER_T(2),CLK,'0','0');
COUNTER_T(2) <= (( NOT Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(2).LFBK) OR (COUNTER(0) AND Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(1).LFBK)); |
FTCPE_COUNTER3: FTCPE port map (COUNTER(3),COUNTER_T(3),CLK,'0','0');
COUNTER_T(3) <= (( NOT Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(3).LFBK) OR (COUNTER(0) AND Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(1).LFBK AND COUNTER(2).LFBK)); |
FTCPE_COUNTER4: FTCPE port map (COUNTER(4),COUNTER_T(4),CLK,'0','0');
COUNTER_T(4) <= (( NOT Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(4).LFBK) OR (COUNTER(0) AND Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(1).LFBK AND COUNTER(2).LFBK AND COUNTER(3).LFBK)); |
FTCPE_COUNTER5: FTCPE port map (COUNTER(5),COUNTER_T(5),CLK,'0','0');
COUNTER_T(5) <= ((EXP5_.EXP) OR (EXP6_.EXP) OR (COUNTER(1) AND COUNTER(2) AND COUNTER(3) AND COUNTER(4) AND NOT COUNTER_END(3) AND COUNTER(0).LFBK) OR (COUNTER(1) AND COUNTER(2) AND COUNTER(3) AND COUNTER(4) AND COUNTER(0).LFBK AND COUNTER(5).LFBK) OR (COUNTER(11) AND COUNTER(1) AND COUNTER(2) AND COUNTER(3) AND COUNTER(4) AND NOT COUNTER_END(7) AND COUNTER(0).LFBK) OR (NOT COUNTER(11) AND COUNTER(1) AND COUNTER(2) AND COUNTER(3) AND COUNTER(4) AND COUNTER(7) AND COUNTER(0).LFBK) OR (COUNTER(1) AND COUNTER(2) AND COUNTER(3) AND COUNTER(4) AND NOT COUNTER(7) AND COUNTER_END(7) AND COUNTER(0).LFBK)); |
FTCPE_COUNTER6: FTCPE port map (COUNTER(6),COUNTER_T(6),CLK,'0','0');
COUNTER_T(6) <= (( NOT Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(6).LFBK) OR (COUNTER(0) AND COUNTER(5) AND Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(1).LFBK AND COUNTER(2).LFBK AND COUNTER(3).LFBK AND COUNTER(4).LFBK)); |
FTCPE_COUNTER7: FTCPE port map (COUNTER(7),COUNTER_T(7),CLK,'0','0');
COUNTER_T(7) <= (( NOT Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(7).LFBK) OR (COUNTER(0) AND COUNTER(5) AND Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(1).LFBK AND COUNTER(2).LFBK AND COUNTER(3).LFBK AND COUNTER(4).LFBK AND COUNTER(6).LFBK)); |
FTCPE_COUNTER8: FTCPE port map (COUNTER(8),COUNTER_T(8),CLK,'0','0');
COUNTER_T(8) <= (( NOT Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(8).LFBK) OR (COUNTER(0) AND COUNTER(5) AND Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(1).LFBK AND COUNTER(2).LFBK AND COUNTER(3).LFBK AND COUNTER(4).LFBK AND COUNTER(6).LFBK AND COUNTER(7).LFBK)); |
FTCPE_COUNTER9: FTCPE port map (COUNTER(9),COUNTER_T(9),CLK,'0','0');
COUNTER_T(9) <= (( NOT Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(9).LFBK) OR (COUNTER(0) AND COUNTER(5) AND Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(1).LFBK AND COUNTER(2).LFBK AND COUNTER(3).LFBK AND COUNTER(4).LFBK AND COUNTER(6).LFBK AND COUNTER(7).LFBK AND COUNTER(8).LFBK)); |
FTCPE_COUNTER10: FTCPE port map (COUNTER(10),COUNTER_T(10),CLK,'0','0');
COUNTER_T(10) <= (( NOT Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(10).LFBK) OR (COUNTER(0) AND COUNTER(5) AND Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(1).LFBK AND COUNTER(2).LFBK AND COUNTER(3).LFBK AND COUNTER(4).LFBK AND COUNTER(6).LFBK AND COUNTER(7).LFBK AND COUNTER(8).LFBK AND COUNTER(9).LFBK)); |
FTCPE_COUNTER11: FTCPE port map (COUNTER(11),COUNTER_T(11),CLK,'0','0');
COUNTER_T(11) <= (( NOT Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(11).LFBK) OR (COUNTER(0) AND COUNTER(5) AND Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(1).LFBK AND COUNTER(2).LFBK AND COUNTER(3).LFBK AND COUNTER(4).LFBK AND COUNTER(6).LFBK AND COUNTER(7).LFBK AND COUNTER(8).LFBK AND COUNTER(9).LFBK AND COUNTER(10).LFBK)); |
FTCPE_COUNTER12: FTCPE port map (COUNTER(12),COUNTER_T(12),CLK,'0','0');
COUNTER_T(12) <= (( NOT Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(12).LFBK) OR (COUNTER(0) AND COUNTER(5) AND Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 AND COUNTER(1).LFBK AND COUNTER(2).LFBK AND COUNTER(3).LFBK AND COUNTER(4).LFBK AND COUNTER(6).LFBK AND COUNTER(7).LFBK AND COUNTER(8).LFBK AND COUNTER(9).LFBK AND COUNTER(10).LFBK AND COUNTER(11).LFBK)); |
FTCPE_COUNTER13: FTCPE port map (COUNTER(13),COUNTER_T(13),CLK,'0','0');
COUNTER_T(13) <= (COUNTER(10) AND COUNTER(11) AND COUNTER(12) AND COUNTER(1) AND COUNTER(2) AND COUNTER(3) AND COUNTER(4) AND COUNTER(6) AND COUNTER(7) AND COUNTER(8) AND COUNTER(9) AND COUNTER(0).LFBK AND COUNTER(5).LFBK); |
FTCPE_COUNTER14: FTCPE port map (COUNTER(14),COUNTER_T(14),CLK,'0','0');
COUNTER_T(14) <= ((COUNTER(13).EXP) OR (COUNTER(10) AND COUNTER(11) AND COUNTER(12) AND COUNTER(1) AND COUNTER(2) AND COUNTER(3) AND COUNTER(4) AND COUNTER(6) AND COUNTER(7) AND COUNTER(8) AND COUNTER(9) AND Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2.LFBK AND COUNTER(0).LFBK AND COUNTER(5).LFBK AND COUNTER(13).LFBK)); |
FDCPE_COUNTER_END0: FDCPE port map (COUNTER_END(0),COUNTER_END_D(0),CLK,'0','0');
COUNTER_END_D(0) <= ((KEY(1) AND KEY(0) AND KEY(2) AND NOT KEY(3)) OR (NOT KEY(1) AND KEY(0) AND KEY(2) AND KEY(3))); |
FDCPE_COUNTER_END1: FDCPE port map (COUNTER_END(1),COUNTER_END_D(1),CLK,'0','0');
COUNTER_END_D(1) <= (KEY(1) AND KEY(0) AND KEY(2) AND NOT KEY(3)); |
FDCPE_COUNTER_END2: FDCPE port map (COUNTER_END(2),COUNTER_END_D(2),CLK,'0','0');
COUNTER_END_D(2) <= (KEY(1) AND NOT KEY(0) AND KEY(2) AND KEY(3)); |
FDCPE_COUNTER_END3: FDCPE port map (COUNTER_END(3),COUNTER_END_D(3),CLK,'0','0');
COUNTER_END_D(3) <= ((KEY(1) AND NOT KEY(0) AND KEY(2) AND KEY(3)) OR (NOT KEY(1) AND KEY(0) AND KEY(2) AND KEY(3))); |
FDCPE_COUNTER_END6: FDCPE port map (COUNTER_END(6),COUNTER_END_D(6),CLK,'0','0');
COUNTER_END_D(6) <= (KEY(1) AND KEY(0) AND NOT KEY(2) AND KEY(3)); |
FDCPE_COUNTER_END7: FDCPE port map (COUNTER_END(7),COUNTER_END_D(7),CLK,'0','0');
COUNTER_END_D(7) <= ((KEY(1) AND KEY(0) AND KEY(2) AND NOT KEY(3)) OR (KEY(1) AND KEY(0) AND NOT KEY(2) AND KEY(3))); |
FDCPE_COUNTER_END9: FDCPE port map (COUNTER_END(9),COUNTER_END_D(9),CLK,'0','0');
COUNTER_END_D(9) <= ((KEY(1) AND KEY(0) AND NOT KEY(2) AND KEY(3)) OR (KEY(1) AND NOT KEY(0) AND KEY(2) AND KEY(3)) OR (NOT KEY(1) AND KEY(0) AND KEY(2) AND KEY(3))); |
FDCPE_COUNTER_END10: FDCPE port map (COUNTER_END(10),COUNTER_END_D(10),CLK,'0','0');
COUNTER_END_D(10) <= ((KEY(1) AND KEY(0) AND NOT KEY(2) AND KEY(3)) OR (NOT KEY(1) AND KEY(0) AND KEY(2) AND KEY(3))); |
Mcompar_COUNTER_cmp_eq0000_AEB_or0000/Mcompar_COUNTER_cmp_eq0000_AEB_or0000_D2 <= ((EXP1_.EXP)
OR (EXP2_.EXP) OR (COUNTER(11) AND NOT COUNTER(7)) OR (COUNTER(12) AND NOT COUNTER(1)) OR (NOT COUNTER(12) AND COUNTER(1)) OR (COUNTER(4) AND NOT COUNTER(8)) OR (NOT COUNTER(4) AND COUNTER(8))); |
FDCPE_OUT_FLAG: FDCPE port map (OUT_FLAG,OUT_FLAG_D,CLK,'0','0');
OUT_FLAG_D <= ((KEY(1) AND KEY(0) AND KEY(2) AND NOT KEY(3)) OR (KEY(1) AND KEY(0) AND NOT KEY(2) AND KEY(3)) OR (KEY(1) AND NOT KEY(0) AND KEY(2) AND KEY(3)) OR (NOT KEY(1) AND KEY(0) AND KEY(2) AND KEY(3))); |
Register Legend:
FDCPE (Q,D,C,CLR,PRE); FTCPE (Q,D,C,CLR,PRE); LDCP (Q,D,G,CLR,PRE); |