Logic

Signal Name Total Pterms Total Inputs Function Block Macrocell Power Mode Slew Rate Pin Number Pin Type Pin Use Reg Init State
ACK_REG<0> 2 2 FB2 MC10 STD     (b) (b) RESET
ACK_REG<1> 1 1 FB2 MC5 STD   74 I/O/GSR (b)  
ACK_REG<2> 1 1 FB2 MC4 STD     (b) (b)  
ACK_REG<3> 1 1 FB2 MC3 STD   72 I/O (b)  
ACK_REG<4> 2 2 FB2 MC9 STD   77 I/O/GTS2 (b) RESET
ACK_REG<5> 2 2 FB2 MC8 STD   76 I/O/GTS1 (b) RESET
ACK_REG<6> 2 2 FB2 MC7 STD     (b) (b) RESET
ACK_REG<7> 2 2 FB2 MC6 STD   75 I/O (b) RESET
ADDRESS_REG<0> 2 2 FB6 MC12 STD   53 I/O (b) RESET
ADDRESS_REG<1> 2 2 FB1 MC10 STD     (b) (b) RESET
ADDRESS_REG<2> 2 2 FB1 MC9 STD   6 I/O (b) RESET
ADDRESS_REG<3> 2 2 FB1 MC8 STD   5 I/O (b) RESET
ADDRESS_REG<4> 2 2 FB1 MC7 STD     (b) (b) RESET
ADDRESS_REG<5> 2 2 FB6 MC11 STD   52 I/O (b) RESET
ADDRESS_REG<6> 2 2 FB6 MC10 STD     (b) (b) RESET
ADDRESS_REG<7> 2 2 FB6 MC9 STD   51 I/O (b) RESET
CLK_1M 1 4 FB5 MC5 STD   34 I/O (b) RESET
CNT<0> 0 0 FB5 MC4 STD     (b) (b) RESET
CNT<1> 1 1 FB5 MC3 STD   33 I/O (b) RESET
CNT<2> 2 4 FB5 MC7 STD     (b) (b) RESET
CNT<3> 2 4 FB5 MC6 STD   35 I/O (b) RESET
COUNTER<0> 2 13 FB3 MC7 STD     (b) (b) RESET
COUNTER<10> 3 13 FB3 MC10 STD     (b) (b) RESET
COUNTER<1> 3 13 FB3 MC9 STD   20 I/O (b) RESET
COUNTER<2> 4 13 FB3 MC12 STD   23 I/O (b) RESET
COUNTER<3> 5 13 FB3 MC14 STD   24 I/O (b) RESET
COUNTER<4> 6 13 FB3 MC16 STD   26 I/O (b) RESET
COUNTER<5> 7 13 FB3 MC18 STD     (b) (b) RESET
COUNTER<6> 7 13 FB3 MC17 STD   31 I/O (b) RESET
COUNTER<7> 6 13 FB3 MC15 STD   25 I/O (b) RESET
COUNTER<8> 5 13 FB3 MC13 STD     (b) (b) RESET
COUNTER<9> 4 13 FB3 MC11 STD   21 I/O (b) RESET
COUNTER_BEGIN<0>/COUNTER_BEGIN<0>_RSTF 5 8 FB4 MC1 STD     (b) (b)  
COUNTER_BEGIN<0>/COUNTER_BEGIN<0>_SETF 7 8 FB4 MC18 STD     (b) (b)  
COUNTER_BEGIN<0> 2 2 FB5 MC12 STD   40 I/O (b) RESET
COUNTER_BEGIN<10>/COUNTER_BEGIN<10>_RSTF 3 8 FB1 MC14 STD   10 I/O/GCK2 (b)  
COUNTER_BEGIN<10>/COUNTER_BEGIN<10>_SETF 5 8 FB5 MC17 STD   44 I/O (b)  
COUNTER_BEGIN<10> 2 2 FB5 MC11 STD   39 I/O (b) RESET
COUNTER_BEGIN<1>/COUNTER_BEGIN<1>_RSTF 5 8 FB5 MC16 STD     (b) (b)  
COUNTER_BEGIN<1>/COUNTER_BEGIN<1>_SETF 6 8 FB4 MC12 STD   67 I/O (b)  
COUNTER_BEGIN<1> 2 2 FB5 MC10 STD     (b) (b) RESET
COUNTER_BEGIN<2>/COUNTER_BEGIN<2>_RSTF 5 8 FB5 MC15 STD   43 I/O (b)  
COUNTER_BEGIN<2>/COUNTER_BEGIN<2>_SETF 6 8 FB4 MC10 STD     (b) (b)  
COUNTER_BEGIN<2> 2 2 FB5 MC9 STD   37 I/O (b) RESET
COUNTER_BEGIN<3>/COUNTER_BEGIN<3>_RSTF 6 8 FB4 MC9 STD   65 I/O (b)  
COUNTER_BEGIN<3>/COUNTER_BEGIN<3>_SETF 6 8 FB4 MC8 STD   63 I/O (b)  
COUNTER_BEGIN<3> 2 2 FB5 MC8 STD   36 I/O (b) RESET
COUNTER_BEGIN<4>/COUNTER_BEGIN<4>_RSTF 7 8 FB4 MC17 STD   70 I/O (b)  
COUNTER_BEGIN<4>/COUNTER_BEGIN<4>_SETF 5 8 FB5 MC14 STD   41 I/O (b)  
COUNTER_BEGIN<4> 2 2 FB6 MC18 STD     (b) (b) RESET
COUNTER_BEGIN<5>/COUNTER_BEGIN<5>_RSTF 6 8 FB4 MC7 STD     (b) (b)  
COUNTER_BEGIN<5>/COUNTER_BEGIN<5>_SETF 5 8 FB5 MC13 STD     (b) (b)  
COUNTER_BEGIN<5> 2 2 FB6 MC17 STD   56 I/O (b) RESET
COUNTER_BEGIN<6>/COUNTER_BEGIN<6>_RSTF 7 8 FB4 MC16 STD     (b) (b)  
COUNTER_BEGIN<6>/COUNTER_BEGIN<6>_SETF 6 8 FB4 MC6 STD   62 I/O (b)  
COUNTER_BEGIN<6> 2 2 FB6 MC16 STD     (b) (b) RESET
COUNTER_BEGIN<7>/COUNTER_BEGIN<7>_RSTF 7 8 FB4 MC14 STD   68 I/O (b)  
COUNTER_BEGIN<7>/COUNTER_BEGIN<7>_SETF 8 8 FB1 MC18 STD     (b) (b)  
COUNTER_BEGIN<7> 2 2 FB6 MC15 STD   55 I/O (b) RESET
COUNTER_BEGIN<8>/COUNTER_BEGIN<8>_RSTF 8 8 FB1 MC17 STD   13 I/O (b)  
COUNTER_BEGIN<8>/COUNTER_BEGIN<8>_SETF 7 8 FB4 MC13 STD     (b) (b)  
COUNTER_BEGIN<8> 2 2 FB6 MC14 STD   54 I/O (b) RESET
COUNTER_BEGIN<9>/COUNTER_BEGIN<9>_RSTF 6 8 FB5 MC18 STD     (b) (b)  
COUNTER_BEGIN<9>/COUNTER_BEGIN<9>_SETF 8 8 FB1 MC15 STD   11 I/O I  
COUNTER_BEGIN<9> 2 2 FB6 MC13 STD     (b) (b) RESET
DATA_PORT<0> 2 2 FB1 MC6 STD FAST 4 I/O I/O  
DATA_PORT<1> 2 2 FB1 MC5 STD FAST 3 I/O I/O  
DATA_PORT<2> 2 2 FB1 MC3 STD FAST 2 I/O I/O  
DATA_PORT<3> 2 2 FB1 MC2 STD FAST 1 I/O I/O  
DATA_PORT<4> 2 2 FB2 MC17 STD FAST 84 I/O I/O  
DATA_PORT<5> 2 2 FB2 MC16 STD FAST 83 I/O I/O  
DATA_PORT<6> 2 2 FB2 MC15 STD FAST 82 I/O I/O  
DATA_PORT<7> 2 2 FB2 MC14 STD FAST 81 I/O I/O  
DATA_REG<0> 3 11 FB2 MC18 STD     (b) (b) RESET
DATA_REG<1> 3 11 FB2 MC13 STD     (b) (b) RESET
DATA_REG<2> 3 11 FB2 MC12 STD   80 I/O (b) RESET
DATA_REG<3> 3 11 FB2 MC11 STD   79 I/O (b) RESET
DATA_REG<4> 3 11 FB1 MC13 STD     (b) (b) RESET
DATA_REG<5> 3 11 FB1 MC12 STD   9 I/O/GCK1 GCK RESET
DATA_REG<6> 3 11 FB1 MC1 STD     (b) (b) RESET
DATA_REG<7> 3 11 FB1 MC11 STD   7 I/O (b) RESET
MUSIC_OUT 1 11 FB3 MC8 STD FAST 19 I/O O RESET
Mtrien_ACK_REG 2 9 FB3 MC1 STD     (b) (b) RESET