********** Mapped Logic ********** |
F(0) <= (NOT A(2) AND NOT A(1) AND NOT A(0)); |
F(1) <= (NOT A(2) AND NOT A(1) AND A(0)); |
F(2) <= (NOT A(2) AND A(1) AND NOT A(0)); |
F(3) <= (NOT A(2) AND A(1) AND A(0)); |
F(4) <= (A(2) AND NOT A(1) AND NOT A(0)); |
F(5) <= (A(2) AND NOT A(1) AND A(0)); |
F(6) <= (A(2) AND A(1) AND NOT A(0)); |
F(7) <= (A(2) AND A(1) AND A(0)); |
Register Legend:
FDCPE (Q,D,C,CLR,PRE); FTCPE (Q,D,C,CLR,PRE); LDCP (Q,D,G,CLR,PRE); |