Equations

********** Mapped Logic **********
FTCPE_Q: FTCPE port map (Q,T,CLK,CLR,'0');
FDCPE_QB: FDCPE port map (QB,QB_D,CLK,'0',CLR);
     QB_D <= Q_OBUF.LFBK
      XOR
     QB_D <= T;
Register Legend:
      FDCPE (Q,D,C,CLR,PRE);
      FTCPE (Q,D,C,CLR,PRE);
      LDCP (Q,D,G,CLR,PRE);