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  OrCAD Verification and Simulation Tools 386+ Version 1.20
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Enclosed is your OrCAD Verification and Simulation Tools 386+
Version 1.20 product (VST 386+).

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VST 386+ v1.20 Features

VST 386+ 1.20 is a valuable enhancement of OrCAD's digital simulation
solution. This version contains significant improvements in several
key areas:

    - Faster simulation run times
    - Increased capacity
    - Support for board-level simulation of multiple FPGAs
    - Signal contention detection
    - Ability to specify components to be ignored during simulation
    - Support for scaled delays in individual simulation model source files

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Miscellaneous technical notes about VST 386+ 1.20

1. Add Device Model - More information about Optimize model

Optimizations include:
  Nodes and logic nodes are renumbered consecutively from one (1).
  Unused gates are removed.
  Common subexpressions (identical series) of logic gates are found.
  3-state buffers, which are always disabled, are removed.
  Any gates that generate unused nodes are removed.
  Boolean transformations:
    Inversion of an inverted logic node is collapsed.
    Inversion of a zero (0) is replaced with one (1).
    Inversion of initialization pulse low (IPL) is replaced with 
    initialization pulse high (IPH).

2. Insert PLD Template - Capacity

A single-source PLD definition file (.DEF) must be less than 64K bytes.
One symptom is an information message from INSRTPLD.EXE that parts
were added more than once.  Create PLD Model (MODELPLD.EXE) will
report that the model is corrupt. Typically you can optimize the size
of a PLD definition file (.DEF) by removing white space and redundant
macros.

3. Simulate - Stimulus detail editor

If the Time Mode is Absolute and the stimulus instructions vary by only 
one or two time units, the detail editor allows illegal stimuli to be built.
To avoid this, do not attempt to add stimulus times after a GOTO 
instruction.

4. Simulate - Memory protection fault

If SIMULATE.EXE is launched by the ESP Design Environment from a 
subdirectory other than the one specified by the ORCADEXE environment 
variable, it will abort, report: "Abnormal program termination: Memory 
protection fault" and return to ESP. This is typically encountered if you 
copy the SIMULATE.EXE file into the local design subdirectory. To avoid 
this, use the default OrCAD installation subdirectory structure or run 
SIMULATE.EXE from the command line or an ESP User button.

5. Simulate, Add Device Model, or Compile Stimulus Specification - 
   Device Not Available

If the time stamps of the ASCII (VST.CFG) and binary (VST.BCF) tool set
configuration files differ, then SIMULATE.EXE, MODELPRO.EXE, or ASCTOVST.EXE
will attempt to run the program VST_C.EXE to compile the ASCII tool set 
configuration. On systems with early (pre-1990 versions) of system BIOS
(Dell Phoenix or AMI American Megatrends Inc.) running with memory 
managers (early versions of Quarterdeck's QEMM or current versions of
Microsoft EMM386), the programs will abort and report: "Abnormal program
termination: Device Not Available."

To avoid this problem, use the ESP Design Environment, Configure Digital
Simulation screen to manipulate the VST 386+ tool set configuration,
or run the command line:

VST_C/B

to compile the ASCII tool set configuration.

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If improvements, bug fixes, or enhancements are available before the next
scheduled release of the product, OrCAD Technical Support can make patches
available on the OrCAD BBS (503) 671-9401 or (503) 671-2050.


If you have any questions regarding this product, contact OrCAD Technical
Support at (503) 671-9400 (Monday-Friday, 6 AM to 4 PM pacific time).

Thanks for your support,  

OrCAD
